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ÇѱÛÁ¦¸ñ(Korean Title) |
º¼Â길 ±â°è ½Ã¹Ä·¹ÀÌÅ͸¦ À§ÇÑ º´·Ä ±¸Á¶ |
¿µ¹®Á¦¸ñ(English Title) |
A Parallel Architecture for Boltzmann Machine Simulator |
ÀúÀÚ(Author) |
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Myungho Kim
Changsung Jung
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¿ø¹®¼ö·Ïó(Citation) |
VOL 23 NO. 02 PP. 0117 ~ 0126 (1996. 02) |
Çѱ۳»¿ë (Korean Abstract) |
º» ³í¹®¿¡¼´Â º¼Â길 ±â°è ÇнÀ ¾Ë°í¸®ÁòÀ» È¿À²ÀûÀ¸·Î ½Ã¹Ä·¹ÀÌÆ® ÇÒ ¼ö ÀÖ´Â º´·Ä ÄÄÇ»ÅÍ ±¸Á¶¸¦ Á¦½ÃÇÑ´Ù. À̸¦ À§ÇØ ¸ÕÀú ¼øÂ÷ ÇнÀ ¾Ë°í¸®ÁòÀÇ º´·Ä¼ºÀ» ºÐ¼®ÇÏ¿© ÇнÀ ¾Ë°í¸®ÁòÀÇ º´·Ä¼ºÀ» ÃÖ´ëÇÑ ¼öÇàÇÒ ¼ö ÀÖ´Â medium-grain º´·Ä ÄÄÇ»ÅÍÀÇ º´·Ä ±¸Á¶¸¦ Á¦½ÃÇÏ°í ÀÌ º´·Ä ÄÄÇ»ÅÍ ±¸Á¶¿¡¼ È¿À²ÀûÀ¸·Î ¼öÇØ¿Àµð´Â º´·Ä ÇнÀ ¾Ë°í¸®ÁòÀ» Á¦¾ÈÇÑ´Ù. Á¦½ÃµÈ º´·Ä ±¸Á¶´Â °¢ ÇÁ·Î¼¼¼°¡ 5°³ÀÇ ÀûÀº Åë¼±¼±¸¸À» °¡Áö¸ç È®À强ÀÌ ÁÁ´Ù´Â ÀåÁ¡À» °¡Áø´Ù. Á¦½ÃµÈ º´·Ä ±¸Á¶¿Í º´·Ä ¾Ë°í¸®ÁòÀ» À籸¼º °¡´ÉÇÑ º´·Ä ÄÄÇ»ÅÍ¿¡¼ ±¸ÇöÇÑ °á°ú ÇÁ·Î¼¼¼ ¼ö¿¡ ºñ·ÊÇÏ´Â ¼º´É Çâ»óÀ» ¾òÀ» ¼ö ÀÖ¾ú´Ù. |
¿µ¹®³»¿ë (English Abstract) |
In this paper, we propose a parallel architecture for simulating the learning algorithm of Boltzmann machine. First, we analyze parallelisms from the learning algorithm executing the paralle architecture for a medium-grain parallel computer that is suitable for executing the parallelisms. And we propose a parallel learning algorithm that is optimally executed on the parallel architecture. The proposed parallel architecture has two advantages. One is that each processor for the architecture needs only 5-communication links : the other is that the architecture is scalable. We implement the architecture and the algorithm on a reconfigurable paralel machine and get linear speed-up proportional to the number of processing elements. |
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