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Ȩ Ȩ > ¿¬±¸¹®Çå > Çмú´ëȸ ÇÁ·Î½Ãµù > Çѱ¹Á¤º¸Åë½ÅÇÐȸ Çмú´ëȸ > 2015³â Ãá°èÇмú´ëȸ

2015³â Ãá°èÇмú´ëȸ

Current Result Document :

ÇѱÛÁ¦¸ñ(Korean Title) ·ÎÁ÷ °øÁ¤ ±â¹ÝÀÇ MTP IP¿ë DC-DC ÄÁ¹öÅÍ ¼³°è
¿µ¹®Á¦¸ñ(English Title) Design of DC-DC converter for a logic process MTP memory IPs
ÀúÀÚ(Author) ¹ÚÇå   À̽ÂÈÆ   Áø±³È«   ÇÏÆǺÀ   ±è¿µÈñ   Heon Park   Seung-Hoon Lee   Kyo-Hong Jin   Pan-Bong Ha   Young-Hee Kim  
¿ø¹®¼ö·Ïó(Citation) VOL 19 NO. 01 PP. 0832 ~ 0836 (2015. 05)
Çѱ۳»¿ë
(Korean Abstract)
º» ³í¹®¿¡¼­´Â ¼¾¼­ ÀÀ¿ë¿¡ ¾Æ³¯·Î±× ȸ·Î Æ®¸®¹ÖÀ̳ª chip ID ÀúÀå¿¡ »ç¿ëµÇ´Â ·ÎÁ÷ °øÁ¤ ±â¹ÝÀÇ Dual Program Voltage¸¦ ÀÌ¿ëÇÑ MTP (Multi-Time Programmable) IP (Intellectual Property)¿ë DC-DC ÄÁ¹öÅ͸¦ ¼³°èÇÏ¿´´Ù. DC-DC ÄÁ¹öÅÍ´Â VPP (=5.25V), VNN (=-5.25V)°ú VNNL (=2¡¤VNN/5)ÀÇ Àü¾ÐÀ» °ø±ÞÇϴ ȸ·Î·Î MOS Ä¿ÆнÃÅ͸¦ »ç¿ëÇÏ¿´°í, 3.3V ¼ÒÀÚ¸¸ »ç¿ëÇÏ¿© ¼³°èÇÏ¿´´Ù. VPP¿Í VNNÀº °¢°¢ 2´Ü°ú 5´ÜÀ¸·Î ±¸¼ºµÇ¾î ÀÖ´Ù. ±×¸®°í ÆßÇÎÀü·ù´Â VPP¿Í VNN °¢°¢ 9.17§Ë¿Í 9.7§ËÀÌ´Ù.



¿µ¹®³»¿ë
(English Abstract)
In this paper, a DC-DC converter is designed for logic process MTP (multi-time programmable) memory IPs using dual program voltage, which are used for analog trimming or storing chip IDs in sensor applications. The DC-DC converter supplies VPP (=5.25V), VNN (=-5.25V), and VNNL (=2¡¤VNN/5). It uses MOS capacitors and designed with only 3,3V devices. VPP and VNN are configured in two and five stages, respectively. And their pumping currents are 9.17§Ë and 9.7§Ë, respectively.


Å°¿öµå(Keyword) Single-Poly EEPROM   MTP   DC-DC Converter  
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