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Ȩ Ȩ > ¿¬±¸¹®Çå > ±¹³» ³í¹®Áö > Çѱ¹Á¤º¸°úÇÐȸ ³í¹®Áö > Á¤º¸°úÇÐȸ³í¹®Áö (Journal of KIISE)

Á¤º¸°úÇÐȸ³í¹®Áö (Journal of KIISE)

Current Result Document :

ÇѱÛÁ¦¸ñ(Korean Title) ÃֽŠÇϵå¿þ¾î¿¡¼­ÀÇ µ¿±âÈ­ µµ±¸µéÀÇ ºñ¿ë
¿µ¹®Á¦¸ñ(English Title) Knowing the Cost of Synchronization Primitives on Modern Hardware
ÀúÀÚ(Author) ¹Ú¼ºÀç   ÇÑÇõ   ¿°Ç念   SeongJae Park   Hyuck Han   Heon Y. Yeom  
¿ø¹®¼ö·Ïó(Citation) VOL 45 NO. 11 PP. 1210 ~ 1215 (2018. 11)
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(Korean Abstract)
¿À´Ã³¯ ³Î¸® »ç¿ëµÇ°í ÀÖ´Â ¸ÖƼ ÄÚ¾î ½Ã½ºÅÛ¿¡¼­´Â ¸ðµç ÇÁ·Î¼¼¼­ Äھ »ç¿ëÇÏ´Â È¿À²ÀûÀÎ µ¿½Ã¼º Á¦¾î ¾Ë°í¸®ÁòÀ» »ç¿ëÇÏ´Â °ÍÀÌ Áß¿äÇÏ´Ù. ±×·¯³ª, ¾Ï´ÞÀÇ ¹ýÄ¢Àº ÇÁ·Î±×·¥ÀÌ È®ÀåµÉ ¼ö ¾ø´Â ºÎºÐÀ» °¡Áö°í ÀÖ´Â ÇÑ ¹«ÇÑÈ÷ È®ÀåµÉ ¼ö ¾ø´Ù°í À̾߱â ÇÑ´Ù. ´õ ³ª¾Æ°¡, ¼ø¼­ÀÇ ¹ýÄ¢Àº µ¿½Ã¼º ¾Ë°í¸®Áò¿¡¼­ ¼ø¼­¸¦ Áþ±â À§ÇÑ ºñ½Ñ µ¿±âÈ­ ÀÛ¾÷Àº »ç¶óÁú ¼ö ¾ø´Ù°í À̾߱â ÇÑ´Ù. °á±¹, ¾Ë°í¸®ÁòÀÇ Æ®·¹À̵å¿ÀÇÁ¸¦ °áÁ¤Áþ±â À§Çؼ± °¢ µ¿±âÈ­ ±â´ÉÀÇ ½ÇÁ¦ ºñ¿ëÀ» ¾Æ´Â °ÍÀÌ Áß¿äÇÏ´Ù. ÀϹÝÀûÀÎ µ¿±âÈ­ µµ±¸µéÀÇ ´ë·«Àû ºñ¿ëÀº ³Î¸® ¾Ë·ÁÁ® ÀÖÁö¸¸, ÀÌ´Â Çϵå¿þ¾î Á¾¼ÓÀûÀ̱⠶§¹®¿¡ ƯÁ¤ ½Ã½ºÅÛ¿¡¼­´Â Á¤È®Ä¡ ¾ÊÀ» ¼ö ÀÖ´Ù. º» ³í¹®Àº ÃֽŠÇϵå¿þ¾î¿¡¼­ µ¿±âÈ­ µµ±¸ÀÇ ºñ¿ëÀ» ÃøÁ¤ÇØ º¸°í ±× °á°ú¿¡ ´ëÇØ ³íÇÑ´Ù.
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(English Abstract)
In multi-core systems, which are widely prevalent, it is important to use an efficient concurrency control algorithm that utilizes every core. However, Amdahl¡¯s Law states that a program cannot scale infinitely if it contains any unscalable sub-section. Furthermore, the Laws of Orders state that the expensive cost of synchronization for ordering in a concurrent algorithm cannot be eliminated. As a consequence, knowing the cost of each synchronization primitive is important for making tradeoff decisions regarding an algorithm. Although the rough costs of common synchronization primitives are already known, the result may be not applicable or inaccurate for a specific system, because the cost is hardware dependent. In this paper, we evaluate the cost of famous synchronization primitives on a modern system and discuss the results.
Å°¿öµå(Keyword) ¸ÖƼ Äھ µ¿½Ã¼º Á¦¾î   ij½Ã ÀÏ°ü¼º ÇÁ·ÎÅäÄÝ   ¾îÅä¹Í ¿ÀÆÛ·¹À̼Ǡ  multi-core   concurrency control   cache coherency protocol   atomic operations  
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