Á¤º¸°úÇÐȸ³í¹®Áö (Journal of KIISE)
Current Result Document :
ÇѱÛÁ¦¸ñ(Korean Title) |
Çϵå¿þ¾î ij½Ã ÆÄƼ¼Å´×°ú ¼ÒÇÁÆ®¿þ¾î ij½Ã ÆÄƼ¼Å´×ÀÇ ¼º´É ºñ±³ |
¿µ¹®Á¦¸ñ(English Title) |
Performance Comparison between Hardware & Software Cache Partitioning Techniques |
ÀúÀÚ(Author) |
¹ÚÁö¿õ
¿°Ç念
¾öÇö»ó
JiWoong Park
HeonYoung Yeom
Hyeonsang Eom
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¿ø¹®¼ö·Ïó(Citation) |
VOL 42 NO. 02 PP. 0177 ~ 0182 (2015. 02) |
Çѱ۳»¿ë (Korean Abstract) |
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¿µ¹®³»¿ë (English Abstract) |
The era of multi-core processors has begun since the limit of the clock speed has been reached. These days, multi-core technology is used not only in desktops, servers, and table PCs, but also in smartphones. In this architecture, there is always interference between processes, because of the sharing of system resources. To address this problem, cache partitioning is used, which can be roughly divided into two types: software and hardware cache partitioning. When it comes to dynamic cache partitioning, hardware cache partitioning is superior to software cache partitioning, because it needs no page copy. In this paper, we compare the effectiveness of hardware and software cache partitioning on the AMD Opteron 6282 SE, which is the only commodity processor providing hardware cache partitioning, to see whether this technique can be effectively deployed in dynamic environments.
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Å°¿öµå(Keyword) |
¸ÖƼ ÄÚ¾î ½Ã½ºÅÛ
ij½Ã ÆÄƼ¼Å´×
ÆäÀÌÁö Ä÷¯¸µ
ÆäÀÌÁö º¹»ç ¿À¹öÇìµå
multi-core processor
cache partitioning
page coloring
page copy overhead
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