• Àüü
  • ÀüÀÚ/Àü±â
  • Åë½Å
  • ÄÄÇ»ÅÍ
´Ý±â

»çÀÌÆ®¸Ê

Loading..

Please wait....

±¹³» ³í¹®Áö

Ȩ Ȩ > ¿¬±¸¹®Çå > ±¹³» ³í¹®Áö > Çѱ¹Á¤º¸Åë½ÅÇÐȸ ³í¹®Áö (Journal of the Korea Institute of Information and Communication Engineering)

Çѱ¹Á¤º¸Åë½ÅÇÐȸ ³í¹®Áö (Journal of the Korea Institute of Information and Communication Engineering)

Current Result Document : 7 / 20 ÀÌÀü°Ç ÀÌÀü°Ç   ´ÙÀ½°Ç ´ÙÀ½°Ç

ÇѱÛÁ¦¸ñ(Korean Title) Hemispherical Grain Silicon¿¡ ÀÇÇÑ Á¤Àü¿ë·® È®º¸ ¹× °øÁ¤Á¶°Ç Ư¼º¿¡ °üÇÑ ¿¬±¸
¿µ¹®Á¦¸ñ(English Title) A Study on Capacitance Enhancement by Hemispherical Grain Silicon and Process Condition Properties
ÀúÀÚ(Author) Á¤¾çÈñ   Á¤À翵   À̽ÂÈñ   °­¼ºÁØ   À̺¸Èñ   À¯ÀÏÇö   ÃÖ³²¼·   Yang-Hee Joung   Jae-Young Choung   Seung-Hee Lee   eong-Jun Kang   Bo-Hee Lee   Il-Hyun You   Nam-Sup Choi  
¿ø¹®¼ö·Ïó(Citation) VOL 04 NO. 04 PP. 0809 ~ 0815 (2000. 11)
Çѱ۳»¿ë
(Korean Abstract)
¿µ¹®³»¿ë
(English Abstract)
The box capacitor structure with HSG-Si described here reliably achieves a cell capacitance of 28fF with a cell area of a 0.482§­©÷ for 128Mbit DRAM. An HSG-Si formation technology with seeding method, which employs Si2H6 molecule irradiation and annealing, was applied for realizing 64Mbit and larger DRAMS. By using this technique, grain size controlled HSG-Si can be fabricated on in-situ phosphorous doped amorphous silicon electrodes. The HSG-Si fabrication technology achieves twice the storage capacitance with high reliability for the stacked capacitors.
Å°¿öµå(Keyword)
ÆÄÀÏ÷ºÎ PDF ´Ù¿î·Îµå