Çѱ¹Á¤º¸Åë½ÅÇÐȸ ³í¹®Áö (Journal of the Korea Institute of Information and Communication Engineering)
ÇѱÛÁ¦¸ñ(Korean Title) |
ÇÁ¸°ÅÍ Çìµå ³ëÁñºÐ»ç Á¦¾î¿ë ÁýÀûȸ·Î¼³°è |
¿µ¹®Á¦¸ñ(English Title) |
Design of an Integrated Circuit for Controlling the Printer Head Ink Nozzle |
ÀúÀÚ(Author) |
Á¤½Â¹Î
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Seung-Min Jung
Jung-Tae Kim
Moon-Key Lee
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¿ø¹®¼ö·Ïó(Citation) |
VOL 07 NO. 04 PP. 0798 ~ 0804 (2003. 08) |
Çѱ۳»¿ë (Korean Abstract) |
º» ³í¹®¿¡¼´Â ÇÁ¸°ÅÍ headÀÇ ³ëÁñºÐ»çÁ¦¾î¸¦ À§ÇÑ °³¼±µÈ ȸ·Î¸¦ ¼³°èÇÏ¿´´Ù. ±âÁ¸ ¹æ½Ä¿¡ ºñÇÏ¿© ºñÇÏ¿© Pad ¼ö¸¦ ÁÙÀÓÀ¸·Î¼ ³ëÁñ ¼ö¸¦ È®Àå½Ãų ¼ö ÀÖ´Ù. Á¦¾ÈµÈ ȸ·Î´Â »çÀü°ËÁõÀ» À§ÇÏ¿© ¸ÕÀú 20°³ÀÇ ³ëÁñÀ» Á¦¾îÇÏ´Â sample ȸ·Î·Î ¼³°èÇÏ°í FPGA¸¦ ÀÌ¿ëÇÏ¿© µ¿ÀÛÀ» È®ÀÎÇÏ¿´´Ù. 320°³ÀÇ ³ëÁñÁ¦¾î¸¦ À§ÇÑ Àüüȸ·Î´Â sample ȸ·Î¸¦ È®ÀåÇÏ¿© ASIC Full Custom ¼³°è¹æ½ÄÀ» ÅëÇÏ¿© ¼³°èÇÑ µÚ ·ÎÁ÷ ¹× ȸ·Î simulation °ËÁõÀ» ÇÏ¿´´Ù. Àüüȸ·Î´Â 3§ CMOS design ruleÀ» Àû¿ëÇÏ¿© layout ¹× chipÀ¸·Î Á¦À۵Ǿú´Ù.
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¿µ¹®³»¿ë (English Abstract) |
In this paper, We have designed an advanced circuits for controlling the Ink Nozzle of Printer Head We can fully increase the number of nozzle by reducing the number of Input/Output PADs using the proposed new circuit. The proposed circuit is tested with only 20 nozzles to evaluate functional test using FPGA sample chip. The new circuit architecture can be estimated. Full circuit for controlling 320 nozzles was designed and simulated from ASIC full custom methodology, then the circuit was fabricated by applying 3§ CMOS process design rule.
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Å°¿öµå(Keyword) |
ÇÁ¸°ÅÍ Á¦¾î
ASIC
FPGA
Nozzle
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ÆÄÀÏ÷ºÎ |
PDF ´Ù¿î·Îµå
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