Çѱ¹Á¤º¸Åë½ÅÇÐȸ ³í¹®Áö (Journal of the Korea Institute of Information and Communication Engineering)
ÇѱÛÁ¦¸ñ(Korean Title) |
ºñµ¿±â ¹æ½ÄÀÇ Á÷·ÄÅë½Å ½Ã½ºÅÛ¿¡¼ Çìµå °ËÃâ ±â´ÉÀ» °¡Áø ȸÀü±â¿ë ¸®½Ã¹öÀÇ FPGA ±¸Çö |
¿µ¹®Á¦¸ñ(English Title) |
A FPGA Implementation of a Rotary Machine Receiver with Detecting a Header on the Asynchronous Serial Communication System |
ÀúÀÚ(Author) |
°ºÀ¼ø
ÀÌâÈÆ
±èÀαÔ
ÇÏÁÖ¿µ
±èÁÖÇö
Bong-Soon Kang
Chang-Hoon Lee
In-Kyu Kim
Ju-You
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¿ø¹®¼ö·Ïó(Citation) |
VOL 09 NO. 01 PP. 0088 ~ 0094 (2005. 02) |
Çѱ۳»¿ë (Korean Abstract) |
º» ³í¹®¿¡¼´Â ȸÀü±âÀÇ À§Ä¡¿¡ ´ëÇÑ Á¤º¸¸¦ °¡Áö°í ÀÖ´Â Encoder¿Í Á¤ÇØÁø °æ·Î(Serial Signal)¸¦ ÅëÇØ Data¸¦ Àü¼ÛÇϰųª ¹Þ°í, DSP·Î Data¸¦ Á¤ÇØÁø °æ·Î(Paralle Signal)¸¦ ÅëÇØ Data¸¦ Àü¼ÛÇϰųª ¹Þ´Â ±â´ÉÀ» °¡Áø Receiver¸¦ FPGA DesignÇÑ °ÍÀÌ´Ù. µ¿ÀÏ µ¿ÀÛ ClockÀ» »ç¿ëÇÏÁö ¾Ê´Â ´Ù¸¥ SystemÀÇ Serial Data Åë½ÅÀ» ÇÏ´Â °æ¿ì, »õ·Î¿î Çì´õ °ËÃâ ¹æ¹ýÀ» Á¦½ÃÇÏ¿© Serial DataÀÇ À¯È¿ÇÑ °¢ BitÀÇ Á¤º¸¸¦ ¾ò±â À§Çؼ´Â Çì´õ ³»ÀÇ Sync. Code¸¦ Çؼ®ÇÏ¿© À¯È¿ DataÀÇ ±æÀ̸¦ ãÀ» ¼ö ÀÖ´Ù. ¶ÇÇÑ ReceiverÀÇ µ¿ÀÛ ÁÖÆļö¸¦ 'clk_select' Port¸¦ »ç¿ëÇÏ¿© ³»ºÎ µ¿ÀÛ ÁÖÆļö¸¦ 20MHz ¶Ç´Â 60MHz¸¦ ¼±ÅÃÇÒ ¼ö ÀÖ´Ù.
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¿µ¹®³»¿ë (English Abstract) |
This paper presents the design and implementation of a receiver operating between a rotary machine encoder and DSP. The receiver connects with the encoder using 1 bit serial data and DSP using 16 bits bus line.
The receiver and encoder use the different operating frequency each other. We suggest a new apparatus and method of synchronized code for header detection in 1bit serial communication. The system operating frequency can be changed into 20MHz or 60MHz by using the external port such as 'clk_select'. |
Å°¿öµå(Keyword) |
Rotary Machine Encoder
Sync. code
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ÆÄÀÏ÷ºÎ |
PDF ´Ù¿î·Îµå
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