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Ȩ Ȩ > ¿¬±¸¹®Çå > ±¹³» ³í¹®Áö > Çѱ¹Á¤º¸Åë½ÅÇÐȸ ³í¹®Áö (Journal of the Korea Institute of Information and Communication Engineering)

Çѱ¹Á¤º¸Åë½ÅÇÐȸ ³í¹®Áö (Journal of the Korea Institute of Information and Communication Engineering)

Current Result Document : 68 / 128 ÀÌÀü°Ç ÀÌÀü°Ç   ´ÙÀ½°Ç ´ÙÀ½°Ç

ÇѱÛÁ¦¸ñ(Korean Title) ´Ù»ó DFT ÇÊÅ͹ðÅ©¸¦ ÀÌ¿ëÇÑ µµ¾à½ÅÈ£ °ËÃâ¿¡ °üÇÑ ¿¬±¸
¿µ¹®Á¦¸ñ(English Title) A Study on Frequency Hopping Signal Detection Using a Polyphase DFT Filterbank
ÀúÀÚ(Author) ±ÇÁ¤¾Æ   ÀÌÄ¡È£   Á¤ÀǸ²   Kwon Jeong-A   Lee Cho-Ho   Jeong Eui-Rim  
¿ø¹®¼ö·Ïó(Citation) VOL 17 NO. 04 PP. 0789 ~ 0796 (2013. 04)
Çѱ۳»¿ë
(Korean Abstract)
½Ã°£¿¡ µû¶ó Áß½ÉÁÖÆļö¸¦ ¹Ù²Ù´Â µµ¾à½ÅÈ£¸¦ µµ¾àÁÖ±â, µµ¾à ÁÖÆļö µî¿¡ ´ëÇÑ Á¤º¸ ¾øÀÌ °ËÃâÇÏ´Â °ÍÀº ´ë´ÜÈ÷ ¾î·Æ´Ù°í ¾Ë·ÁÁ® ÀÖ´Ù. º» ³í¹®¿¡¼­´Â µµ¾à ½ÅÈ£°¡ Á¸ÀçÇÏ´Â ±¤´ë¿ª »ùÇøµ ½ÅÈ£·ÎºÎÅÍ µµ¾à½ÅÈ£ÀÇ Áß½ÉÁÖÆļö, µµ¾à Áֱ⠵îÀÇ Á¤º¸¸¦ °ËÃâÇÏ´Â ¾Ë°í¸®ÁòÀ» Á¦¾ÈÇÏ¿´´Ù. µµ¾à ½ÅÈ£¸¦ °ËÃâÇϱâ À§ÇÑ ÀϹÝÀûÀÎ ¹æ¹ýÀ¸·Î´Â ´Ù¼öÀÇ Çù´ë¿ª ÇÊÅÍ°¡ ÇÊ¿äÇÏÁö¸¸ ÀÌ·¯ÇÑ ±¸ÇöÀº ºñÈ¿À²ÀûÀ̹ǷΠº» ³í¹®¿¡¼­´Â ´Ù»ó DFT ÇÊÅ͹ðÅ©¸¦ µµÀÔÇÏ¿´´Ù. ¶ÇÇÑ ´Ù»ó DFT ÇÊÅ͹ðÅ©ÀÇ Ãâ·ÂÀ¸·ÎºÎÅÍ µµ¾à½ÅÈ£¸¦ °ËÃâÇÏ´Â ¾Ë°í¸®ÁòÀ» Á¦¾ÈÇÏ¿´´Ù. Á¦¾ÈÇÏ´Â °ËÃâ ¾Ë°í¸®ÁòÀº ¸Þ¸ð¸® »çÀÌÁ ±¸Çö º¹Àâµµ¸¦ ÁÙÀ̱â À§ÇØ ÀÌÁø À̹ÌÁö ½Åȣ󸮿¡ ±â¹ÝÇÏ¿© °³¹ßµÇ¾ú´Ù. Á¦¾ÈÇÏ´Â ¾Ë°í¸®ÁòÀÇ ¼º´ÉÀº ¸ðÀǽÇÇè°ú FPGA (field programmable gate array) ±¸ÇöÀ» ÅëÇÏ¿© È®ÀÎÇÏ¿´´Ù.
¿µ¹®³»¿ë
(English Abstract)
It is known that the detection of hopping signals without any information about hopping duration and hopping frequency is rather difficult. This paper considers the blind detection of hopping signal¡¯s information such as hopping duration and hopping frequency from the sampled wideband signals. In order to find hopping information from the wideband signals, multiple narrow-band filters are required in general, which leads to huge implementation complexity. Instead, this paper employs the polyphase DFT(discrete Fourier transform) filterbank to reduce the implementation complexity. This paper propose hopping signal detection algorithm from the polyphase DFT filterbank output. Specifically, based on the binary image processing, the proposed algorithm is developed to decrease the memory size and H/W complexity. The performance of the proposed algorithm is evaluated through the computer simulation and FPGA (field programmable gate array) implementation.
Å°¿öµå(Keyword) ´Ù»ó DFT ÇÊÅ͹ðÅ©   ÁÖÆļö µµ¾à½ÅÈ£   À̹ÌÁö ½Åȣ󸮠  2-D ÀÌÁø À̹ÌÁö   Polyphase DFT filterbank   Frequency-hopping signal   Image signal processing   2-D binary image  
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