JIPS (한국정보처리학회)
Current Result Document :
| 한글제목(Korean Title) |
Hardware Software Co-Simulation of the Multiple Image Encryption Technique Using the Xilinx System Generator |
| 영문제목(English Title) |
Hardware Software Co-Simulation of the Multiple Image Encryption Technique Using the Xilinx System Generator |
| 저자(Author) |
Panduranga H T
Dr. Naveen Kumar S K
Sharath Kumar H S
|
| 원문수록처(Citation) |
VOL 09 NO. 03 PP. 0499 ~ 0510 (2013. 09) |
한글내용
(Korean Abstract) |
|
영문내용
(English Abstract) |
Hardware-Software co-simulation of a multiple image encryption technique shall be described in this paper. Our proposed multiple image encryption technique is based on the Latin Square Image Cipher (LSIC). First, a carrier image that is based on the Latin Square is generated by using 256-bits of length key. The XOR operation is applied between an input image and the Latin Square Image to generate an encrypted image. Then, the XOR operation is applied between the encrypted image and the second input image to encrypt the second image. This process is continues until the nth input image is encrypted. We achieved hardware co-simulation of the proposed multiple image encryption technique by using the Xilinx System Generator (XSG). This encryption technique is modeled using Simulink and XSG Block set and synthesized onto Virtex 2 pro FPGA device. We validated our proposed technique by using the hardware software co-simulation method. |
| 키워드(Keyword) |
Image Encryption
Latin Square
|
| 파일첨부 |
|
