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Ȩ Ȩ > ¿¬±¸¹®Çå > ¿µ¹® ³í¹®Áö > JSTS (Journal of Semiconductor Technology and Science)

JSTS (Journal of Semiconductor Technology and Science)

Current Result Document :

ÇѱÛÁ¦¸ñ(Korean Title) A Novel Vector-matrix Multiplication (VMM) Architecture based on NAND Memory Array
¿µ¹®Á¦¸ñ(English Title) A Novel Vector-matrix Multiplication (VMM) Architecture based on NAND Memory Array
ÀúÀÚ(Author) Suhyeon Kim   Myung-Hyun Baek   Sungmin Hwang   Taejin Jang   Kyungchul Park   Byung-Gook Park  
¿ø¹®¼ö·Ïó(Citation) VOL 20 NO. 03 PP. 0242 ~ 0248 (2020. 06)
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(Korean Abstract)
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(English Abstract)
We propose a novel vector-matrix multiplication (VMM) architecture based on NAND synaptic array using a pMOSFET which is an analog switch shape cell for neural network (NN) applications. A NAND FLASH memory string is consisting of a NAND cell and a pMOSFET not to open string. A NAND cell¡¯s resistance can be modulated by threshold voltage (Vth) depending on the amount of trapped charge when an input signal applies. If there is no input spike, a NAND cell is turned off and a pMOSFET acts as a pass gate so that only a constant voltage drop exists. Based on this NAND cell and a pMOSFET pair series, we confirm VMM operation. And inference method 1 layer fullyconnected network (FCN) is implemented by circuit simulation to test 8x8 MNIST. The result of 84% recognition accuracy compared to software artificial neural networks (ANN) 86% accuracy.
Å°¿öµå(Keyword) SNN   analog synapse   analog switch   neuromorphic   synaptic array  
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