JSTS (Journal of Semiconductor Technology and Science)
Current Result Document :
ÇѱÛÁ¦¸ñ(Korean Title) |
A Novel Vector-matrix Multiplication (VMM) Architecture based on NAND Memory Array |
¿µ¹®Á¦¸ñ(English Title) |
A Novel Vector-matrix Multiplication (VMM) Architecture based on NAND Memory Array |
ÀúÀÚ(Author) |
Suhyeon Kim
Myung-Hyun Baek
Sungmin Hwang
Taejin Jang
Kyungchul Park
Byung-Gook Park
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¿ø¹®¼ö·Ïó(Citation) |
VOL 20 NO. 03 PP. 0242 ~ 0248 (2020. 06) |
Çѱ۳»¿ë (Korean Abstract) |
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¿µ¹®³»¿ë (English Abstract) |
We propose a novel vector-matrix multiplication (VMM) architecture based on NAND synaptic array using a pMOSFET which is an analog switch shape cell for neural network (NN) applications. A NAND FLASH memory string is consisting of a NAND cell and a pMOSFET not to open string. A NAND cell¡¯s resistance can be modulated by threshold voltage (Vth) depending on the amount of trapped charge when an input signal applies. If there is no input spike, a NAND cell is turned off and a pMOSFET acts as a pass gate so that only a constant voltage drop exists. Based on this NAND cell and a pMOSFET pair series, we confirm VMM operation. And inference method 1 layer fullyconnected network (FCN) is implemented by circuit simulation to test 8x8 MNIST. The result of 84% recognition accuracy compared to software artificial neural networks (ANN) 86% accuracy.
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Å°¿öµå(Keyword) |
SNN
analog synapse
analog switch
neuromorphic
synaptic array
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ÆÄÀÏ÷ºÎ |
PDF ´Ù¿î·Îµå
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