JICCE (한국정보통신학회)
Current Result Document :
| 한글제목(Korean Title) |
Design of Temperature Stable FLL Circuit |
| 영문제목(English Title) |
Design of Temperature Stable FLL Circuit |
| 저자(Author) |
Jin-Ho Choi
|
| 원문수록처(Citation) |
VOL 08 NO. 02 PP. 0197 ~ 0200 (2010. 04) |
한글내용
(Korean Abstract) |
|
영문내용
(English Abstract) |
The FLL(frequency locked loop) circuit is used to generate an output signal that tracks an input reference signal. The locking time of FLL is short compared to PLL(phase locked loop) circuit because the output signal of FLL is synchronized only in frequency. Also the FLL is designed to allow the circuit to be fully integrated. In this paper, the temperature stable FLL circuit is designed by using full CMOS transistors. When the temperature is varied from -20 oC to 70oC, the variation of output frequency is about from -2% to 1.6% from HSPICE simulation results. |
| 키워드(Keyword) |
temperature stable characteristics
voltage reference
frequency locked loop
frequency-to-voltage converter
voltage controlled oscillator
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| 파일첨부 |
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