Journal of EEIS
Current Result Document :
ÇѱÛÁ¦¸ñ(Korean Title) |
Design and Implementation of a Massively Parallel Multithreaded Architecture: DAVRID |
¿µ¹®Á¦¸ñ(English Title) |
Design and Implementation of a Massively Parallel Multithreaded Architecture: DAVRID |
ÀúÀÚ(Author) |
Sangho Ha
Junghwan Kim
unh Rho
Yoonhee Nah
Sangyong Han
Daejoon Hwang
Heunghwan Kim
Seungho Cho
|
¿ø¹®¼ö·Ïó(Citation) |
VOL 01 NO. 02 PP. 0015 ~ 0026 (1996. 06) |
Çѱ۳»¿ë (Korean Abstract) |
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¿µ¹®³»¿ë (English Abstract) |
MPAs(Massively Parallel Architectures) should address two fundamental issues for scalability: synchronization and communication latency. Dataflow architecture faces problems of excessive synchronization overhead and ineffecinet execution of sequential programs while they offer the ability to exploit massive parallelism inherent in programs. In contrast, MPAs based on von Neumann computational model may suffer from inefficient synchronization mechanism and communication latecy. DAVRID(DAtaflow/Von Neumann RISC hybrID) is a massively parallel multithreaded architecture which takes advantages of von NEumann and dataflow models. It has good single thread performance as well as tolerates synchronization and comunication latecy. In this paper, we describe the DAVRID architecture in detail and evaluate its performance through simulation urns over several benchmarks. |
Å°¿öµå(Keyword) |
Computer Architecture and Systems
Massively Parallel Multithreaded Architecture
DAVRID
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