TIIS (한국인터넷정보학회)
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| 한글제목(Korean Title) |
IMT: A Memory-Efficient and Fast Updatable IP Lookup Architecture Using an Indexed Multibit Trie |
| 영문제목(English Title) |
IMT: A Memory-Efficient and Fast Updatable IP Lookup Architecture Using an Indexed Multibit Trie |
| 저자(Author) |
Junghwan Kim
Myeong-Cheol Ko
Moon Sun Shin
Jinsoo Kim
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| 원문수록처(Citation) |
VOL 13 NO. 04 PP. 1922 ~ 1940 (2019. 04) |
한글내용
(Korean Abstract) |
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영문내용
(English Abstract) |
IP address lookup is a function to determine nexthop for a given destination IP address. It takes an important role in modern routers because of its computation time and increasing Internet traffic. TCAM-based IP lookup approaches can exploit the capability of parallel searching but have a limitation of its size due to latency, power consumption, updatability, and cost. On the other hand, multibit trie-based approaches use SRAM which has relatively low power consumption and cost. They reduce the number of memory accesses required for each lookup, but it still needs several accesses. Moreover, the memory efficiency and updatability are proportional to the number of memory accesses. In this paper, we propose a novel architecture using an Indexed Multibit Trie (IMT) which is based on combined TCAM and SRAM. In the proposed architecture, each lookup takes at most two memory accesses. We present how the IMT is constructed so as to be memory-efficient and fast updatable. Experiment results with real-world forwarding tables show that our scheme achieves good memory efficiency as well as fast updatability.
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| 키워드(Keyword) |
IP address lookup
indexed multibit trie
subtrie-pushing
TCAM-based index
prefix updatability
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| 파일첨부 |
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